In general, the present invention relates to power sensing circuits and methods. More particularly, the invention is of exceptional utility in those applications requiring an accurate response to changes in applied circuit voltages such that subsequent circuitry will be immediately powered down when the applied voltage drops below a specified level but also requiring a predetermined delay for powering up the subsequent circuitry when the applied voltage rises back to the same specified level.
In magnetic bubble memories, the accurate sensing of applied supply voltages is critical and the coil pre-drivers for the magnetic coils used therewith must be powered down immediately upon the fall of supply voltages below a specified level. Typically, bubble memories require both a V.sub.DD and V.sub.CC sources for their associated CMOS and T.sup.2 L circuitry, the level of each of which must be accurately monitored. However, a delay is necessary in powering the coil pre-drivers back up upon restoration of the V.sub.DD or V.sub.CC to the same specified level to insure stability of generation. The length of the delay required is dependent on individual circuit requirements.
Previously, there has been no readily implemented means for both speeding up the power down signal while simultaneously delaying a power up signal for the coil pre-drivers in a magnetic bubble memory system. Particularly, there has been no means for responding as above described with respect to the plurality of voltages necessary in such a system. Moreover, there has previously been disclosed no circuit which could be readily integrated on a conventional semiconductor substrate.
It is therefore an object of the present invention to provide an improved power sensing circuit and method.
It is also an object of the invention to provide an improved power sensing circuit and method which can speed up a power down signal to subsequent circuitry while selectively delaying a power up signal.
It is also an object of the invention to provide an improved power sensing circuit and method which can sense and react to a plurality of supply voltages.
It is also an object of the invention to provide an improved power sensing circuit and method which can be readily integrated onto a semiconductor substrate using standard CMOS technology.